Power-Aware Architectural Synthesis

Power consumption is of great important parameters of modern electronic systems. It impacts the performance, cooling costs, packaging costs, and reliability of integrated circuits (ICs), as well as the lifespans of battery-powered electronics. Therefore, it is important to consider power consumption during design. The complexity and scope of automatic design continues to increase. It is now possible to automatically design, i.e., synthesize, complex ICs and systems from high-level specifications without designer intervention. Architectural synthesis has been an active research area for more than a decade. Since addressing power consumption at higher levels of the design process increases the potential for improvement, researchers have developed a wide range of power optimization and management techniques to address IC power consumption issues during architectural synthesis. In this article, we present techniques for the synthesis of low-power ICs and systems. In particular, we focus on power-aware behavioral synthesis and system synthesis. The rest of this article is organized as follows. In Section I-A, we introduce and define behavioral synthesis and system synthesis. In Section II, we describe the contributors to IC and system power consumption and discuss a number of techniques to improve power and thermal characteristics. Many of these techniques will prove useful in both behavioral synthesis and system synthesis. In Sections III and IV, we provide details on behavioral synthesis and system synthesis and indicate areas of active research. Section V points out a few commercial architectural synthesis products. We conclude in Section VI.